Platform for Xilinx Zynq/UltraScale

We are a multifunctional group of FPGA, firmware, and software engineers with over a decade of experience in Xilinx Zynq Systems on Chip (SoC). Our focus is to design custom and optimal platforms to jump-start and accelerate the development of mission-critical embedded products using the Xilinx Zynq 7 series, MPSOC UltraScale Plus, and RFSOC family of devices.

Leveraging our extensive experience, we have developed Xilinx Zynq based platforms that have helped our customers quickly prototype ideas, integrate their IP’s, perform a quick proof of concept, and accelerate their concepts to market. Using our custom building blocks, our customers can focus on what is essential to them: IP and product development, while leaving the rest to us such as platform software, system upgrade, security, power management, and application deployment.

Mission Statement

Provide a platform for Xilinx Zynq-7000, Zynq UltraScale+ MPSoC, Zynq UltraScale+ RFSoC to perform rapid prototyping, proof of concepts, and jumpstart product development by providing supporting RTL, Firmware and Software building blocks

Core Product and Services

  • Platform : Battery included platform for Zynq-7000, Zynq UltraScale+ MPSoC, Zynq UltraScale+ RFSoC
  • Hardware: FPGA architecture design, Vivado project setup with the automated build process
  • 50+ custom DSP IPs for Zynq-7000, Zynq UltraScale+ MPSoC, Zynq UltraScale+ RFSoC
  • Multi OS platform for Xilinx multi-core heterogeneous architecture ( Linux, RTOS, and bare-metal application and RTL)
  • Multi OS lifecycle management, communication, and synchronization middleware layer
  • Petalinux board support packages (BSP) for tens of community boards and costume boards
  • Yocto board support packages (BSP) for tens of community boards and costume boards with a meta-soccentric layer
  • Secure boot, software upgrade over the air, full active-passive upgrades as well as packages upgrade, security
  • Customize and configure bootloader, RTOS, firmware: arm trusted firmware, first state bootloader,
  • Costume Linux drivers for Linux ( DMA, I2C, and hardware ip integrations)
  • Middleware libraries and runtime environment support
  • Cross compiler and software development kit support
  • Networking, database, MQTT, image processing libraries support
  • VCU and GPU support
  • Machine learning, dpdk support
  • ROS/ROS2 support for our robotic customers
  • Continuous Development with docker and jenkins
  • Continuous Delivery using software upgrade over the air with


Battery included a production-ready platform, ideal for rapid prototyping, proof of concept designs, and production-level product. The platform includes RTL hardware IP, Operating System ( Linux, and ROTS). Device drivers( Linux and ROTS), Middleware, Software stacks, secure booting, system upgrade over the air, and complete set of tools for build release and deployment.

Platform Features

  • Multi-operating system platform for Xilinx Multicore Xilinx Zynq 7 series, MPSOC UltraScale Plus, and RFSOC
  • Multi-operating system - Linux for A15/A53/A77, Bare-metal RTOS(Zephyr /FreeRTOS) for Arm R5,A15/A53/A77/MicroBlaze/M1/M3
  • Multi-operating system platform managed via OpeanAMP(remoteproc, rpmsg, virtiIO, and libmetal)
  • Soccentric build system based on petalinux/Yocto for a single build and deployment system
  • Simple process for customizing firmware ( ARM trusted firmware and the Platform Management Unit (PMU) firmware
  • Linux kernel, device tree, bootloaders (FSBL, U-boot) customization support
  • Create a portable board support packages (BSP) and deployment
  • 50+ Linux device drivers built-in, costume device drivers easily integrated include Serial portal ( UART, I2C, SPI, USB), PCI, MIPI, DMA
  • Build-in driver support for USB and MIPI camera support
  • Reggen: automatically generate C/C++ code to interface with AXI PL to PS
  • Middleware layer for Linux drive drivers
  • Build-in hypervisor support for running multiple Linux OS
  • Full/Partial FPGA programming support
  • Build-in several boot medium support: Quad SPI flash memory (QSPI24, QSPI32), eMMC18, NAND. Secure Digital Interface Memory (SD0, SD1).JTAG, USB, SD boo, Network boot (TFTP/NFS
  • Full/Partial FPGA programming support
  • Boot process optimization, secure boot, application lifecycle management, application supervision support
  • Software components management via meta layers and Open source/proprietary library management via bitbake recipe recipe
  • Build-in software update: partial update via package management, full system update via A/B active-passive system upgrade
  • Build-in support for - power management, secure logging, system security, file system security
  • Build-in support for General-purpose computing on graphics processing, H.264/H.265 Video Codec Unit (VCU)
  • Build-in support for Xilinx Xilinx® Deep Learning Processing Unit (DPU), DEep ComprEssioN Tool (DECENT) , Deep Neural Network Compiler (DNNC), Neural Network Runtime (N2Cube), Profiler
  • Software development kid, cross compiler, debugger support for AR5, A15/A53/A77/MicroBlaze/M1/M3
  • Robot Operating System (ROS/ROS2) compatible platform
  • Software life cycle management: git, gitlab, github, docker, ansible, jenkins, jira


  • Board file creation based on customer IO requirements
  • High bandwidth custom DMA interfaces for high-performance multi-channel parallel data streams (>300MHz)
  • Multi-channel serializer/deserializer for ADC/DAC integration
  • Peripheral integration through programmable logic IPs: SPI, I2C, CAN, Rs232, USB, UART, Ethernet, PCI-E
  • Custom memory and interrupt controllers for efficient system management
  • Multidimensional FFT/IFFT for frequency domain analysis
  • Image/video processing convolution-based filters for feature extraction and description.
  • Transmit and receive IP pairs for beamforming in radar and multi-sensor imaging reconstruction
  • Cordic-based operations: trigonometric functions, square root, exponential and angle shift operations
  • Lossy and lossless data compression: MPEG, JPEG, H.310, H.320, Log-based compression
  • Gaussian pseudo-random number generators to simulate additive white gaussian noise
  • Huffman encoders/decoders for lossless data compression
  • Ray tracing and 3D rendering for real-time video applications
  • AES encryption and decryption cores for cryptographic algorithm acceleration
  • Display controllers compatible with most LED, LCD, CRT, and VGA displays
  • Design integration with Xilinx AXI interfaces: AXI DMA; AXI GPIO; AXI Stream; AXI Lite
  • FPGA Integrated Design Environment toolset such as Xilinx Vivado and Mentor Graphics ModelSim.
  • .Analyze, design, and implement HDL test benches in hardware description languages, HDL (VHDL, Verilog), for code validation and validation against software models.
  • Analyze, design, simulate, and implement designs that interface to common signaling standards, typical IP hard macros such as SERDES, PLLS, etc. and/or protocols such as PCIe, JESD204B, LVDS, etc.
  • Develop project test plans and test procedures, provide test planning support, and assist in the execution of both lab testing and field testing.
  • Generate and maintain engineering drawings and configuration management policies for the FPGA project hierarchy.
  • Develop and maintain requirements documents, functional specification documents, interface control documents, etc.
  • Perform design constraints generation and verification as well as evaluate synthesis and timing performance reports.
  • Analyze, design, simulate, and implement algorithms in hardware description languages, HDL (VHDL, Verilog), based on customer requirements and/or MATLAB model

Successful Projects

We have successfully completed multiple projects over the last decade, we have had the privilege to work on multiple domains and disciplines. However, we discovered that there is a common thread among all of these projects. Some of the common themes are commonly used FPGA IPs, bootloaders, ROS, embedded Linux, device drivers, middleware, and software stacks, tools and toolchain, and SDK.

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